ATLAS II: οptimizing a 10Gbps σingle-chip ATM switch
(EL)
Πνευματικατος Διονυσιος
(EL)
George Kornaros
(EN)
Pnevmatikatos Dionysios
(EN)
Πολυτεχνείο Κρήτης
(EL)
Technical University of Crete
(EN)
We describe ATLAS II, an optimized version of the ATLAS I ATM
switch. While in ATLAS I we concentrated on correctness, in ATLAS II we
concentrate on optimizing the area and the performance of the switch. To
achieve these goals we utilize improved design techniques and circuitry,
and we eliminate functionalities of marginal benefit. Our results show
that we can achieve significant performance and cost benefits, requiring
only a small increment in manpower
(EN)
