A Fully-Automated Desynchronization Flow for Synchronous Circuits
Μια πλήρως αυτοματοποιημένη Ροή Αποσυγχρονισμού για Σύγχρονα Κυκλώματα
Variability is one of todays fundamental problems faced by nano-scale electronic circuits, and is posing a very serious threat to the continuation of Moores law. Alternative design and implementation methodologies, with respect to the conventional synchronous scheme, have been presented in the past for managing timing and environmental variations. Desynchronization is an approach that converts a post-synthesized synchronous gate-level circuit to a more robust asynchronous one. This work implements the first fully-automated EDA design flow using industrial tools for synthesis, DFT insertion, placement, routing and so on. The flow includes an extra desynchronization step, implemented using a desynchronization tool that automatically applies the desynchronization technique, converting the synchronous circuits and generating scripts for standard tools, in particular to control static timing analysis and physical design. Two test designs were implemented in a 90nm industrial library down to the mask layout level, in order to validate the technique and compare the desynchronized circuits to their synchronous counterparts. The desynchronized circuits exhibit significantly better variability tolerance, typical instead of worst corner case performance with reasonable area and power consumption overhead.