Scalable processors in the billion-transistor Era: IRAM

see the original item page
in the repository's web site and access all digital files if the item*

1997 (EN)
Scalable processors in the billion-transistor Era: IRAM (EN)

Kozyrakis, CE (EN)
Patterson, D (EN)
Golbus, J (EN)
Perissakis, S (EN)
Treuhaft, N (EN)
Fromm, R (EN)
Groibstad, B (EN)
Asanovic, K (EN)
Thomas, R (EN)
Yelick, K (EN)
Anderson, T (EN)
Keeton, K (EN)
Cardwell, N (EN)

N/A (EN)

ther architecture alternatives, like wide superscalarand VLIW (very long instruction word), suffer fromdrawbacks---implementation complexity, low utilizationof resources, and immature compiler technology---or deliver only modest performance improve--ments. Moreover, they usually exacerbate the mainmemory bandwidth bottleneck.3Beyond the uniprocessor, the possibility exists forthe integration of multiple processors on a single die,but this integration would place even greater... (EN)


Intelligent random access storage (IRAM) (EN)
Performance Improvement (EN)
Cost effectiveness (EN)
Microprocessor chips (EN)
Storage allocation (computer) (EN)
Billion transistors (EN)
Bandwidth (EN)
Very Long Instruction Word (EN)
Vector compilation technology (EN)
Random access storage (EN)
Transistors (EN)

Εθνικό Μετσόβιο Πολυτεχνείο (EL)
National Technical University of Athens (EN)

Computer (EN)


N/A (EN)

*Institutions are responsible for keeping their URLs functional (digital file, item page in repository site)