Least-squares iterative solution on a fixed-size VLSI architecture
(EN)
Παπαδοπουλου Ελενη
(EL)
Papadopoulou Eleni
(EN)
T. S. Papatheodorou
(EN)
Πολυτεχνείο Κρήτης
(EL)
Technical University of Crete
(EN)
The VLSI implementation of the Accelerated Overrelaxation (AOR) method, when used for the accurate computation of the least-squares solutions of overdetermined systems, is the problem addressed here. As the size of this computational task is usually very large, we use space-time domain expansion techniques to partition the computation and map it onto a fixed size VLSI architecture.
(EN)
