SYSTEMATIC SYNTHESIS OF PARALLEL VLSI ARCHITECTURES FROM FP SPECIFICATIONS AND ITS APPLICATION TO SCENE MATCHING

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Title

SYSTEMATIC SYNTHESIS OF PARALLEL VLSI ARCHITECTURES FROM FP SPECIFICATIONS AND ITS APPLICATION TO SCENE MATCHING (EN)

Creator

TSANAKAS, P (EN)

PAPAKONSTANTINOU, G (EN)

BILALIS, N (EN)

Type

journalArticle (EN)

Partial document
Publication in journal (EN)

Article
Scientific article (EN)

Issued

2014-03-01T01:41:33Z

1992 (EN)

Year

1992 (EN)

Description

A new CAD system for the development of problem-oriented VLSI architectures, exploiting the inherent parallelism of the respective algorithms, is presented. The behavioral specifications are given in an extended version of the FP language, which allows abstract and generic definitions, and can be subject to formal algebraic transformations. The presented system is capable of synthesizing VLSI architectures from FP specifications, taking into account the user-provided specifications for the sequencing of the input data in the final architecture. The application of scene matching is presented as a case study for the development of alternative parallel scene-matching architectures, using the same FP specifications with different input data sequencing forms. It is shown that the resulting architectures are comparable with others that have been designed on an ad hoc basis. (EN)

Scientific field

Computer Science, Hardware & Architecture (EN)

Engineering and Technology ▶ Electrical engineering, Electronic engineering, Information engineering
Computer science, Hardware and Architecture (EN)

Subject

HARDWARE (EN)

PROGRAMS (EN)

HIGH-LEVEL SYNTHESIS (EN)

ALGEBRA (EN)

DESIGN METHODOLOGY (EN)

Journal

MICROPROCESSING AND MICROPROGRAMMING (EN)

Language